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tag in the same code block. The present invention relates generally to a method of fabricating a semiconductor device, and more particularly to a method of fabricating a memory device. Generally, large scale integrated devices (LSIs) have input/output pads with a high proximity to a memory cell array and a chip pad, and low-proximity to a bonding pad. Also, for higher integration, various types of memories, for example, dynamic random access memory (DRAM), are employed in the same chip. However, the size of contacts between the memory cells and the bonding pad increases the size of a cell array, lowering the integration density. To reduce the size of contacts, a self-aligned contact hole may be formed to be aligned with an active area to prevent misalignment to a bonding pad. However, due to misalignment, the contact hole may not be correctly formed over the active area. Conventional methods of forming a LSI, especially a memory device, typically use damascene and then etch back to prevent the contact hole from being formed at the boundary of the active area. However, when the etch back process is repeated, leakage may occur between adjacent conductive layers. Also, the etch back process is performed twice, which increases the number of processes and the fabrication cost. As a result, a fabricating process has been introduced which does not use the etch back process.
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